Type

Workshop

Abstract

Scaling up solid-state quantum processors will require high-performance, densely integrated cryogenic CMOS electronics, operating at temperatures deep in the sub-Kelvin regime. Besides potential cryogenic performance improvements in semiconductors, such as increased charge carrier mobility and lower subthreshold-leakage, a major obstacle is marked by power dissipation of large-scale integrated CMOS circuits in combination with a diminishing thermal budget towards lower temperatures. In order to reduce the power consumption of CMOS ICs at ultralow temperatures accordingly, we manufacture fully depleted silicon-on-insulator circuits with ultralow temperature adjusted switching characteristics on a combined cryo-CMOS and SiMOS-qubit pilot line. With our technology, individual MOSFETs consistently achieve record-low subthreshold swing in the range of 0.3 - 2 mV/dec at sub-Kelvin temperatures, enabling a reduction in supply voltage, and consequent power dissipation of cryo-CMOS ICs well below cooling power figures in solid-state millikelvin refrigerators. Based on this platform we are developing fully packaged 2.5D/3D integrated circuits for qubit control, which are combined with low-temperature adjusted or novel approaches for directional switching of RF signals and DC demultiplexing.

Handouts