Type
Technology Technical Session
T10 | Process Technology for CMOS Scaling
Speakers
Presentations
- Thu. Jun. 18 | 8:00 AM - 8:25 AM – T10.1 | First Demonstration of Metal Interconnect At-Resolution Stitching with 0.55NA EUV Lithography for A10 Node and Beyond
- Thu. Jun. 18 | 8:25 AM - 8:50 AM – T10.2 | First Demonstration of a Functional Gate-All-Around Nanosheet CMOS Circuit Using Single Exposure High NA EUV BEOL Interconnects
- Thu. Jun. 18 | 8:50 AM - 9:15 AM – T10.3 | High Yield Sub 20 nm Ru Direct Metal Etch Enabled by Single-Exposure 0.55NA EUV and dry MOR Technology
- Thu. Jun. 18 | 9:15 AM - 9:40 AM – T10.4 | Direct Synthesis of Multi-stacked Channels and Doped Source/Drains for TMD CFETs